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» A Unified Architectural Tradeoff Methodology
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DAC
2009
ACM
14 years 10 months ago
Evaluating design trade-offs in customizable processors
The short time-to-market window for embedded systems demands automation of design methodologies for customizable processors. Recent research advances in this direction have mostly...
Unmesh D. Bordoloi, Huynh Phung Huynh, Samarjit Ch...
CODES
2008
IEEE
13 years 9 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
WOA
2001
13 years 11 months ago
An Agent Based Design Process for Cognitive Architectures in Robotics
Nowadays, robots have to face very complex tasks, often requiring collaboration between several individuals. As a consequence, robotics can be considered one of the most suitable ...
Antonio Chella, Massimo Cossentino, Ignazio Infant...
DAC
1996
ACM
14 years 1 months ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
EUROSPI
2005
Springer
14 years 3 months ago
Using Rational Unified Process in an SME - A Case Study
The Rational Unified Process (RUP) is a comprehensive software development process framework emphasizing use-cases, architecture focus and an iterative approach. RUP is widely know...
Geir Kjetil Hanssen, Hans Westerheim, Finn Olav Bj...