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FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
13 years 11 months ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask
EPIA
2009
Springer
14 years 2 months ago
An ILP System for Learning Head Output Connected Predicates
Inductive Logic Programming (ILP) [1] systems are general purpose learners that have had significant success on solving a number of relational problems, particularly from the biol...
José Carlos Almeida Santos, Alireza Tamaddo...
BMCBI
2010
112views more  BMCBI 2010»
13 years 8 months ago
TabSQL: a MySQL tool to facilitate mapping user data to public databases
Background: With advances in high-throughput genomics and proteomics, it is challenging for biologists to deal with large data files and to map their data to annotations in public...
Xiaoqin Xia, Michael McClelland, Yipeng Wang
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ANCS
2007
ACM
13 years 12 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos