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» A Virtual Assembly Design Environment
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SBCCI
2003
ACM
113views VLSI» more  SBCCI 2003»
15 years 9 months ago
Tangram - Virtual Integration of Heterogeneous IP Components in a Distributed Co-Simulation Environment
IP reuse is essential in embedded SoC design. IP components may be described in different modeling languages and present heterogeneous interfaces. The Tangram environment supports...
Uilian Rafael Feijo Souza, Josue Klafke Sperb, Bra...
IFIP
1999
Springer
15 years 8 months ago
Virtual environments in educational networks
: The field of Virtual Environments (VEs) is rapidly evolving into a new means of communication and accessing information, likely to overcome many existent technologies. However, b...
Christos Bouras, Agisilaos Konidaris, Afrodite Sev...
AVI
2004
15 years 5 months ago
A visual tool for tracing users' behavior in Virtual Environments
Although some guidelines (e.g., based on architectural principles) have been proposed for designing Virtual Environments (VEs), several usability problems can be identified only b...
Luca Chittaro, Lucio Ieronutti
EUROPAR
2003
Springer
15 years 9 months ago
On the Characterization of Distributed Virtual Environment Systems
Abstract. Distributed Virtual Environment systems have experienced a spectacular growth last years. One of the key issues in the design of scalable and costeffective DVE systems is...
Pedro Morillo, Juan M. Orduña, Marcos Fern&...
VRML
2004
ACM
15 years 9 months ago
PathSim visualizer: an Information-Rich Virtual Environment framework for systems biology
Increasingly, biology researchers and medical practitioners are using computational tools to model and analyze dynamic systems across scales from the macro to the cellular to the ...
Nicholas F. Polys, Doug A. Bowman, Chris North, Re...