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» A Visual Approach to Validating System Level Designs
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167
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RTAS
1997
IEEE
15 years 6 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
118
Voted
PADS
2006
ACM
15 years 8 months ago
A Framework for Robust HLA-based Distributed Simulations
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...
Dan Chen, Stephen John Turner, Wentong Cai
139
Voted
ESAS
2004
Springer
15 years 8 months ago
Public Key Cryptography in Sensor Networks - Revisited
The common perception of public key cryptography is that it is complex, slow and power hungry, and as such not at all suitable for use in ultra-low power environments like wireless...
Gunnar Gaubatz, Jens-Peter Kaps, Berk Sunar
ICRA
2002
IEEE
101views Robotics» more  ICRA 2002»
15 years 7 months ago
Rover Autonomy for Long Range Navigation and Science Data Acquisition on Planetary Surfaces
This paper describes recent work undertaken at the Jet Propulsion Laboratory in Pasadena, CA in the area of increased rover autonomy for planetary surface operations. The primary ...
Terrance L. Huntsberger, Hrand Aghazarian, Yang Ch...
124
Voted
BMCBI
2010
147views more  BMCBI 2010»
15 years 2 months ago
baySeq: Empirical Bayesian methods for identifying differential expression in sequence count data
Background: High throughput sequencing has become an important technology for studying expression levels in many types of genomic, and particularly transcriptomic, data. One key w...
Thomas J. Hardcastle, Krystyna A. Kelly