Sciweavers

2695 search results - page 451 / 539
» A Visual Approach to Validating System Level Designs
Sort
View
142
Voted
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
13 years 10 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
128
Voted
CAD
2008
Springer
15 years 2 months ago
Detecting approximate symmetries of discrete point subsets
Detecting approximate symmetries of parts of a model is important when attempting to determine the geometric design intent of approximate boundary-representation (B-rep) solid mod...
Ming Li, Frank C. Langbein, Ralph R. Martin
EWC
2010
91views more  EWC 2010»
15 years 1 months ago
Multiobjective global surrogate modeling, dealing with the 5-percent problem
When dealing with computationally expensive simulation codes or process measurement data, surrogate modeling methods are firmly established as facilitators for design space explor...
Dirk Gorissen, Ivo Couckuyt, Eric Laermans, Tom Dh...
118
Voted
HICSS
2008
IEEE
163views Biometrics» more  HICSS 2008»
15 years 9 months ago
Building a Test Suite for Web Application Scanners
This paper describes the design of a test suite for thorough evaluation of web application scanners. Web application scanners are automated, black-box testing tools that examine w...
Elizabeth Fong, Romain Gaucher, Vadim Okun, Paul E...
118
Voted
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
15 years 8 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon