1008 search results - page 10 / 202 » A cis-regulatory logic simulator |
CADE
2006
Springer
14 years 9 months ago
2006
Springer
Abstract. We investigate cut-elimination and cut-simulation in impredicative (higher-order) logics. We illustrate that adding simple axioms such as Leibniz equations to a calculus ...
EUROGP
2003
Springer
14 years 1 months ago
2003
Springer
This paper presents a method of using genetic programming to seek new cellular automata that perform computational tasks. Two genetic algorithms are used : the first one discovers ...
DAC
2000
ACM
14 years 29 days ago
2000
ACM
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
HICSS
1996
IEEE
14 years 22 days ago
1996
IEEE
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
EURODAC
1994
IEEE
14 years 21 days ago
1994
IEEE
A
exible test environment is presented that allows for dierent methods of parallelizing discrete event simulation to be evaluated in a uniform environment. The testbed is portabl...