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GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
13 years 10 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
BMCBI
2007
109views more  BMCBI 2007»
13 years 8 months ago
TABASCO: A single molecule, base-pair resolved gene expression simulator
Background: Experimental studies of gene expression have identified some of the individual molecular components and elementary reactions that comprise and control cellular behavio...
Sriram Kosuri, Jason R. Kelly, Drew Endy
DAC
2007
ACM
14 years 9 months ago
An Effective Guidance Strategy for Abstraction-Guided Simulation
tive Guidance Strategy for Abstraction-Guided Simulation Flavio M. De Paula Alan J. Hu Department of Computer Science, University of British Columbia, {depaulfm, ajh}@cs.ubc.ca D...
Flavio M. de Paula, Alan J. Hu
EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
14 years 26 days ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel
ISPASS
2009
IEEE
14 years 3 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...