1008 search results - page 69 / 202 » A cis-regulatory logic simulator |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
PACS
2004
Springer
14 years 2 months ago
2004
Springer
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
ASPDAC
2010
ACM
13 years 6 months ago
2010
ACM
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
IWANN
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. In this paper we analyse a serial (ripple carry) and a parallel (Kogge-Stone) adder when operating in subthreshold at 100nm and 70nm. These are targeted for ultra low pow...
AAAI
1994
13 years 10 months ago
1994
Sometimes inferences made at some specific time are valid at other times, too. In model-based diagnosis and monitoring as well as qualitative simulation inferences are often re-do...