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» A comparative study of power efficient SRAM designs
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ASPDAC
2007
ACM
131views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen
ISPD
2009
ACM
79views Hardware» more  ISPD 2009»
14 years 2 months ago
A routing approach to reduce glitches in low power FPGAs
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
Quang Dinh, Deming Chen, Martin D. F. Wong
ISCAS
2005
IEEE
161views Hardware» more  ISCAS 2005»
14 years 1 months ago
A traffic aware, energy efficient MAC protocol for wireless sensor networks
— In this paper, we focus on the problem of designing an energy efficient MAC protocol for wireless sensor networks and propose a novel scheme, named as TEEM (Traffic aware, Ener...
Changsu Suh, Young-Bae Ko
DATE
2008
IEEE
101views Hardware» more  DATE 2008»
14 years 2 months ago
Resilient Dynamic Power Management under Uncertainty
With the increasing levels of variability and randomness in the characteristics and behavior of manufactured nanoscale structures and devices, achieving performance optimization u...
Hwisung Jung, Massoud Pedram
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...
Xiaodong Zhang, Magdy Bayoumi