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FPL
2005
Springer
122views Hardware» more  FPL 2005»
14 years 1 months ago
FPGA-Aware Garbage Collection in Java
— During codesign of a system, one still runs into the impedance mismatch between the software and hardware worlds. er identifies the different levels of abstraction of hardware...
Philippe Faes, Mark Christiaens, Dries Buytaert, D...
EMSOFT
2007
Springer
14 years 1 months ago
Virtual execution of AADL models via a translation into synchronous programs
Architecture description languages are used to describe both the hardware and software architecture of an application, at system-level. The basic software components are intended ...
Erwan Jahier, Nicolas Halbwachs, Pascal Raymond, X...
IOLTS
2000
IEEE
105views Hardware» more  IOLTS 2000»
13 years 12 months ago
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
Patrick Girard, Christian Landrault, Serge Pravoss...
AVI
2006
13 years 9 months ago
Shakespeare's complete works as a benchmark for evaluating multiscale document navigation techniques
In this paper, we describe an experimental platform dedicated to the comparative evaluation of multiscale electronic-document navigation techniques. One noteworthy characteristic ...
Yves Guiard, Michel Beaudouin-Lafon, Yangzhou Du, ...
GG
2004
Springer
14 years 26 days ago
Model Checking Graph Transformations: A Comparison of Two Approaches
Model checking is increasingly popular for hardware and, more recently, software verification. In this paper we describe two different approaches to extend the benefits of model ...
Arend Rensink, Ákos Schmidt, Dániel ...