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1999
Tsinghua U.
13 years 11 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
CCS
2008
ACM
13 years 9 months ago
Ether: malware analysis via hardware virtualization extensions
Malware has become the centerpiece of most security threats on the Internet. Malware analysis is an essential technology that extracts the runtime behavior of malware, and supplie...
Artem Dinaburg, Paul Royal, Monirul I. Sharif, Wen...
GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
13 years 11 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan
HPCA
1998
IEEE
13 years 11 months ago
Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory
A key challenge in achieving high performance on software DSM systems is overcoming their relatively large communication latencies. In this paper, we consider two techniques which...
Todd C. Mowy, Charles Q. C. Chan, Adley K. W. Lo
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
13 years 11 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...