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ACL
1990
13 years 8 months ago
A Hardware Algorithm for High Speed Morpheme Extraction and its Implementation
This paper describes a new hardware algorithm for morpheme extraction and its implementation on a specific machine (MEX-I), as the first step toward achieving natural language par...
Toshikazu Fukushima, Yutaka Ohyama, Hitoshi Miyai
TC
2010
13 years 6 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
AFRICACRYPT
2009
Springer
13 years 5 months ago
Efficient Acceleration of Asymmetric Cryptography on Graphics Hardware
Graphics processing units (GPU) are increasingly being used for general purpose computing. We present implementations of large integer modular exponentiation, the core of public-ke...
Owen Harrison, John Waldron
CASES
2009
ACM
14 years 2 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
ICCS
2003
Springer
14 years 25 days ago
Method Call Acceleration in Embedded Java Virtual Machines
Object oriented languages, in particular Java, use a frequent dynamic dispatch mechanism to search for the definition of an invoked method. A method could be defined in more than...
Mourad Debbabi, M. M. Erhioui, Lamia Ketari, Nadia...