144 search results - page 23 / 29 » A compiler framework for the reduction of worst-case executi... |
JAPLL
2008
13 years 7 months ago
2008
In this paper, we study the following basic problem: After having executed a sequence of actions, find a sequence of actions that brings the agent back to the state just before th...
ISVLSI
2003
IEEE
14 years 27 days ago
2003
IEEE
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
For a grid middleware to perform resource allocation, prediction models are needed, which can determine how long an application will take for completion on a particular platform o...