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» A computational architecture for heterogeneous reasoning
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ICPP
1999
IEEE
14 years 1 months ago
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
David López, Josep Llosa, Eduard Ayguad&eac...
DELOS
2000
13 years 10 months ago
SMP and Cluster Architectures for Retrieval of Images in Digital Libraries
: This paper presents an overview over parallel architectures for the efficient realisation of digital libraries by considering image databases as an example. The state of the art ...
Odej Kao
IPPS
2007
IEEE
14 years 3 months ago
RAxML-Cell: Parallel Phylogenetic Tree Inference on the Cell Broadband Engine
Computational phylogeny is a challenging application even for the most powerful supercomputers. It is also an ideal candidate for benchmarking emerging multiprocessor architecture...
Filip Blagojevic, Alexandros Stamatakis, Christos ...
IPPS
2007
IEEE
14 years 3 months ago
Domain Decomposition vs. Master-Slave in Apparently Homogeneous Systems
This paper investigates the utilization of the master-slave (MS) paradigm as an alternative to domain decomposition (DD) methods for parallelizing lattice gauge theory (LGT) model...
Cyril Banino-Rokkones
IWCMC
2006
ACM
14 years 2 months ago
Dynamic and automatic connection of personal area networks to the global internet
In the Next Generation Networks (NGNs) users will carry multiple devices forming cooperative networks known as Personal Area Networks (PANs). Some existing technologies enable thi...
Rui Campos, Manuel Ricardo