We propose a context-logic style formalism, Timed Reasoning Logics (TRL), to describe resource-bounded reasoners who take time to derive consequences of their knowledge. The seman...
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
In the class of repeated sequences that occur in DNA, minisatellites have been found polymorphic and became useful tools in genetic mapping and forensic studies. They consist of a...
The advent of the mobile Web and the increasing demand for personalized contents arise the need for computationally expensive services, such as dynamic generation and on-thefly a...
We present an initial report on using our distributed, collaborative grid enabled visualization environment to link SuperComputing 2004 (Pittsburgh, PA, USA) with the Cardiff Scho...