Sciweavers

1184 search results - page 194 / 237
» A computational architecture for heterogeneous reasoning
Sort
View
HPDC
1997
IEEE
14 years 2 months ago
PARDIS: A Parallel Approach to CORBA
This paper describes PARDIS, a system containing explicit support for interoperability of PARallel DIStributed applications. PARDIS is based on the Common Object Request Broker Ar...
Katarzyna Keahey, Dennis Gannon
HPDC
2010
IEEE
13 years 10 months ago
A GPU accelerated storage system
Massively multicore processors, like, for example, Graphics Processing Units (GPUs), provide, at a comparable price, a one order of magnitude higher peak performance than traditio...
Abdullah Gharaibeh, Samer Al-Kiswany, Sathish Gopa...
BMCBI
2010
218views more  BMCBI 2010»
13 years 10 months ago
Fast multi-core based multimodal registration of 2D cross-sections and 3D datasets
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
Michael Scharfe, Rainer Pielot, Falk Schreiber
SACMAT
2009
ACM
14 years 4 months ago
Supporting RBAC with XACML+OWL
XACML does not natively support RBAC and even the specialized XACML profiles are not able to support many relevant constraints such as static and dynamic separation of duty. Exte...
Rodolfo Ferrini, Elisa Bertino
DEPCOS
2008
IEEE
180views Hardware» more  DEPCOS 2008»
14 years 4 months ago
A Resilient SIL 2 Driver Machine Interface for Train Control Systems
In railway train-borne equipment, the Driver Machine Interface (DMI) acts like a bridge between the train driver and the onboard automatic train control system (European Vital Com...
Andrea Ceccarelli, István Majzik, Danilo Io...