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» A connection level model for IEEE 802.11 cells
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ICPP
2009
IEEE
14 years 2 months ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
ICECCS
2005
IEEE
87views Hardware» more  ICECCS 2005»
14 years 1 months ago
Modeling Diverse and Complex Interactions Enabled by Middleware as Connectors in Software Architectures
Middleware enables distributed components to interact with each others in diverse and complex manners. Such interactions should be modeled at architecture level for controlling th...
Yali Zhu
AINA
2007
IEEE
14 years 2 months ago
Towards Device-Blending: Model and Challenges
This position paper proposes a device-blending architecture for aggregating device functionality via inter-device peer-topeer relationships, effectively forming a multi-device “...
Harinder Seera, Seng Wai Loke, Torab Torabi
FCCM
1995
IEEE
135views VLSI» more  FCCM 1995»
13 years 11 months ago
Architectural descriptions for FPGA circuits
FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
Satnam Singh
FM
2009
Springer
138views Formal Methods» more  FM 2009»
14 years 2 months ago
What Can Formal Methods Bring to Systems Biology?
This position paper argues that the operational modelling approaches from the formal methods community can be applied fruitfully within the systems biology domain. The results can ...
Nicola Bonzanni, K. Anton Feenstra, Wan Fokkink, E...