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CODES
2009
IEEE
14 years 17 days ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
AOSD
2008
ACM
13 years 10 months ago
Edicts: implementing features with flexible binding times
In a software product line, the binding time of a feature is the time at which one decides to include or exclude a feature from a product. Typical binding site implementations are...
Venkat Chakravarthy, John Regehr, Eric Eide
CGO
2009
IEEE
14 years 3 months ago
Fast Track: A Software System for Speculative Program Optimization
—Fast track is a software speculation system that enables unsafe optimization of sequential code. It speculatively runs optimized code to improve performance and then checks the ...
Kirk Kelsey, Tongxin Bai, Chen Ding, Chengliang Zh...
METRICS
1997
IEEE
14 years 29 days ago
Inheritance Tree Shapes and Reuse
The shapes of forests of inheritance trees can affect the amount of code reuse in an object-oriented system. Designers can benefit from knowing how structuring decisions affect r...
Byung-Kyoo Kang, James M. Bieman
ISPASS
2010
IEEE
14 years 3 months ago
Hardware prediction of OS run-length for fine-grained resource customization
—In the past ten years, computer architecture has seen a paradigm shift from emphasizing single thread performance to energy efficient, throughput oriented, chip multiprocessors...
David Nellans, Kshitij Sudan, Rajeev Balasubramoni...