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LATINCRYPT
2010
13 years 8 months ago
Accelerating Lattice Reduction with FPGAs
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...
Jérémie Detrey, Guillaume Hanrot, Xa...
PVM
2004
Springer
14 years 3 months ago
Minimizing Synchronization Overhead in the Implementation of MPI One-Sided Communication
The one-sided communication operations in MPI are intended to provide the convenience of directly accessing remote memory and the potential for higher performance than regular poin...
Rajeev Thakur, William D. Gropp, Brian R. Toonen
JCB
2000
105views more  JCB 2000»
13 years 9 months ago
A Greedy Algorithm for Aligning DNA Sequences
For aligning DNA sequences that differ only by sequencing errors, or by equivalent errors from other sources, a greedy algorithm can be much faster than traditional dynamic progra...
Zheng Zhang 0004, Scott Schwartz, Lukas Wagner, We...
ICASSP
2011
IEEE
13 years 1 months ago
Promoting convergence in multi-channel blind signal separation using PNLMS
The proportionate normalized least-mean squares (PNLMS) adaptation algorithm exploits the sparse nature of acoustic impulse responses and assigns adaptation gain proportional to t...
Muhammad Z. Ikram
FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
14 years 3 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...