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ITC
2002
IEEE
81views Hardware» more  ITC 2002»
14 years 1 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
MVA
2010
129views Computer Vision» more  MVA 2010»
13 years 3 months ago
Assessment of the influence of adaptive components in trainable surface inspection systems
Abstract In this paper, we present a framework for the classification of images in surface inspection tasks and address several key aspects of the processing chain from the origina...
Christian Eitzinger, Wolfgang Heidl, Edwin Lughofe...
SIGMOD
2009
ACM
136views Database» more  SIGMOD 2009»
14 years 8 months ago
A comparison of approaches to large-scale data analysis
There is currently considerable enthusiasm around the MapReduce (MR) paradigm for large-scale data analysis [17]. Although the basic control flow of this framework has existed in ...
Andrew Pavlo, Erik Paulson, Alexander Rasin, Danie...
VLDB
1999
ACM
145views Database» more  VLDB 1999»
14 years 16 days ago
DBMSs on a Modern Processor: Where Does Time Go?
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill...
ISCAS
2003
IEEE
167views Hardware» more  ISCAS 2003»
14 years 1 months ago
The multi-level paradigm for distributed fault detection in networks with unreliable processors
In this paper, we study the effectiveness of the multilevel paradigm in considerably reducing the diagnosis latency of distributed algorithms for fault detection in networks with ...
Krishnaiyan Thulasiraman, Ming-Shan Su, V. Goel