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» A functional formalization of on chip communications
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MEMOCODE
2003
IEEE
14 years 1 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
CONCUR
2006
Springer
14 years 7 days ago
Modeling Timed Concurrent Systems
Timed concurrent systems are widely used in concurrent and distributed real-time software, modeling of hybrid systems, design of hardware systems (using hardware description langua...
Xiaojun Liu, Eleftherios Matsikoudis, Edward A. Le...
SCP
2011
255views Communications» more  SCP 2011»
13 years 3 months ago
Map fusion for nested datatypes in intensional type theory
A definitional extension LNGMIt of the Calculus of Inductive Constructions (CIC), that underlies the proof assistant Coq, is presented that allows also to program with nested dat...
Ralph Matthes
HICSS
2003
IEEE
159views Biometrics» more  HICSS 2003»
14 years 1 months ago
Building a Knowledge Sharing Company - Evidence From the Finnish Insurance Industry
This paper crystallises out some key findings of knowledge management practices from a Finnish survey on the insurance industry. 15 Finnish insurance companies of different sizes ...
Gunilla Widén-Wulff, Reima Suomi
RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
14 years 2 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes