Sciweavers

2209 search results - page 252 / 442
» A high performance JPEG2000 architecture
Sort
View
SBACPAD
2003
IEEE
121views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Optimizing Packet Capture on Symmetric Multiprocessing Machines
Traffic monitoring and analysis based on general purpose systems with high speed interfaces, such as Gigabit Ethernet and 10 Gigabit Ethernet, requires carefully designed software...
Gianluca Varenni, Mario Baldi, Loris Degioanni, Fu...
ICPP
1999
IEEE
14 years 1 months ago
Parallel Media Processors for the Billion-Transistor Era
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
Jason Fritts, Zhao Wu, Wayne Wolf
ICRA
1999
IEEE
201views Robotics» more  ICRA 1999»
14 years 1 months ago
ARMAR: An Anthropomorphic Arm for Humanoid Service Robot
Service robots which should perform human-like operation will penetrate into a great number of applications in the future. Requirements for this is high flexibility, autonomy and ...
Karsten Berns, Tamim Asfour, Rüdiger Dillmann
WCRE
1999
IEEE
14 years 1 months ago
Restructuring Functions with Low Cohesion
We present a technique for restructuring functions with low cohesion into functions with high cohesion. Such restructuring is desirable when re-architecting a legacy system into a...
Arun Lakhotia, Jean-Christophe Deprez
HPCA
1996
IEEE
14 years 1 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...