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» A high performance JPEG2000 architecture
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HIPC
2009
Springer
13 years 7 months ago
Integrating and optimizing transactional memory in a data mining middleware
As the size of available datasets in various domains is growing rapidly, there is an increasing need for scaling data mining implementations. Coupled with the current trends in co...
Vignesh T. Ravi, Gagan Agrawal
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 6 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
HPCA
2005
IEEE
14 years 10 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...
ICCS
2003
Springer
14 years 2 months ago
Self-Organizing Hybrid Neurofuzzy Networks
Abstract. We introduce a concept of self-organizing Hybrid Neurofuzzy Networks (HNFN), a hybrid modeling architecture combining neurofuzzy (NF) and polynomial neural networks(PNN)....
Sung-Kwun Oh, Su-Chong Joo, Chang-Won Jeong, Hyun-...
COMPUTER
2002
103views more  COMPUTER 2002»
13 years 9 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst