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FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
14 years 27 days ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
MAM
2007
113views more  MAM 2007»
13 years 7 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
ICIP
2000
IEEE
14 years 9 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
ISCAS
2003
IEEE
85views Hardware» more  ISCAS 2003»
14 years 24 days ago
A robust global motion estimation scheme for sprite coding
A new global motion estimation technique for sprite coding is presented in this paper. The proposed system manages to accurately register frames to a sprite without referencing th...
Hoi-Kok Cheung, Wan-Chi Siu
IPPS
2006
IEEE
14 years 1 months ago
On-chip and on-line self-reconfigurable adaptable platform: the non-uniform cellular automata case
In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware imp...
Andres Upegui, Eduardo Sanchez