Sciweavers

172 search results - page 30 / 35
» A high performance reconfigurable Motion Estimation hardware...
Sort
View
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 11 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
VLSISP
2011
358views Database» more  VLSISP 2011»
13 years 2 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
ICT
2004
Springer
131views Communications» more  ICT 2004»
14 years 26 days ago
Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors
The Resilient Packet Ring IEEE 802.17 is an evolving standard for the construction of Local and Metropolitan Area Networks. The RPR protocol scales to the demands of future packet ...
Andreas Kirstädter, Axel Hof, Walter Meyer, E...
WCE
2007
13 years 8 months ago
On Line Surface Roughness Measurement Using Image Processing and Machine Vision
- Machine vision has evolved to become a mainstream automation tool, enabling computers to replace human vision in high speed and precision manufacturing techniques. Images usually...
M. Rajaram Narayanan, S. Gowri, M. Murali Krishna
TCSV
2002
119views more  TCSV 2002»
13 years 7 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...