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A memory-reduced log-MAP kernel for turbo decoder
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ISCAS
2005
IEEE
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Hardware
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A memory-reduced log-MAP kernel for turbo decoder
14 years 1 months ago
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gra103.aca.ntu.edu.tw
Tsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu
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SIPS
2008
IEEE
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Signal Processing
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Unified decoder architecture for LDPC/turbo codes
14 years 2 months ago
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Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro
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