Sciweavers

77 search results - page 5 / 16
» A new cache architecture based on temporal and spatial local...
Sort
View
ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
13 years 12 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
ICIP
2006
IEEE
14 years 9 months ago
Exploiting Spatial Redundancy in Pixel Domain Wyner-Ziv Video Coding
Distributed video coding is a recent paradigm that enables a flexible distribution of the computational complexity between the encoder and the decoder building on top of distribut...
Alan Trapanese, Catarina Brites, Fernando Pereira,...
IPPS
2006
IEEE
14 years 1 months ago
Exploiting processing locality through paging configurations in multitasked reconfigurable systems
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
T. Taher, Tarek A. El-Ghazawi
ICDCSW
2002
IEEE
14 years 16 days ago
Class-Based Delta-Encoding: A Scalable Scheme for Caching Dynamic Web Content
Abstract—Caching static HTTP traffic in proxy-caches has reduced bandwidth consumption and download latency. However, web-caching performance is hard to increase further due to ...
Konstantinos Psounis
IPPS
2009
IEEE
14 years 2 months ago
A metascalable computing framework for large spatiotemporal-scale atomistic simulations
A metascalable (or “design once, scale on new architectures”) parallel computing framework has been developed for large spatiotemporal-scale atomistic simulations of materials...
Ken-ichi Nomura, Richard Seymour, Weiqiang Wang, H...