An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
We study a discrete problem of scheduling activities of several types under the constraint that at most a single activity can be scheduled to any one period. Applications of such ...
Abstract-- Computing constrained shortest paths is fundamental to some important network functions such as QoS routing, which is to find the cheapest path that satisfies certain co...
In a distributed system or communication network tasks may need to be executed on more than one processor. For time-critical tasks, the timing constraints are typically given as e...
Balancing assembly lines is a crucial task for manufacturing companies in order to improve productivity and minimize production costs. Despite some progress in exact methods to so...
Sophie D. Lapierre, Angel B. Ruiz, Patrick Soriano