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ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
14 years 28 days ago
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanja...
DAM
1998
77views more  DAM 1998»
13 years 7 months ago
The Scheduling of Maintenance Service
We study a discrete problem of scheduling activities of several types under the constraint that at most a single activity can be scheduled to any one period. Applications of such ...
Shoshana Anily, Celia A. Glass, Refael Hassin
TON
2008
125views more  TON 2008»
13 years 7 months ago
Two techniques for fast computation of constrained shortest paths
Abstract-- Computing constrained shortest paths is fundamental to some important network functions such as QoS routing, which is to find the cheapest path that satisfies certain co...
Shigang Chen, Meongchul Song, Sartaj Sahni
ICDCS
1992
IEEE
13 years 11 months ago
End-to-End Scheduling to Meet Deadlines in Distributed Systems
In a distributed system or communication network tasks may need to be executed on more than one processor. For time-critical tasks, the timing constraints are typically given as e...
Riccardo Bettati, Jane W.-S. Liu
EOR
2006
129views more  EOR 2006»
13 years 7 months ago
Balancing assembly lines with tabu search
Balancing assembly lines is a crucial task for manufacturing companies in order to improve productivity and minimize production costs. Despite some progress in exact methods to so...
Sophie D. Lapierre, Angel B. Ruiz, Patrick Soriano