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DAC
2006
ACM
14 years 13 days ago
IMPRES: integrated monitoring for processor reliability and security
Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even `trusted so...
Roshan G. Ragel, Sri Parameswaran
MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
14 years 2 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
ICDE
2002
IEEE
110views Database» more  ICDE 2002»
14 years 10 months ago
A Publish & Subscribe Architecture for Distributed Metadata Management
The emergence of electronic marketplaces and other electronic services and applications on the Internet is creating a growing demand for effective management of resources. Due to ...
Markus Keidl, Alexander Kreutz, Alfons Kemper, Don...
DAC
2005
ACM
13 years 10 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
DSD
2010
IEEE
190views Hardware» more  DSD 2010»
13 years 9 months ago
Hardware-Based Speed Up of Face Recognition Towards Real-Time Performance
— Real-time face recognition by computer systems is required in many commercial and security applications because it is the only way to protect privacy and security in the sea of...
I. Sajid, Sotirios G. Ziavras, M. M. Ahmed