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AHS
2006
IEEE
138views Hardware» more  AHS 2006»
14 years 1 months ago
Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has sh...
Emanuele Stomeo, Tatiana Kalganova, Cyrille Lamber...
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
14 years 1 months ago
Using functional independence conditions to optimize the performance of latency-insensitive systems
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
Cheng-Hong Li, Luca P. Carloni
ACCV
2006
Springer
14 years 1 months ago
Boosted Algorithms for Visual Object Detection on Graphics Processing Units
Nowadays, the use of machine learning methods for visual object detection has become widespread. Those methods are robust. They require an important processing power and a high mem...
Hicham Ghorayeb, Bruno Steux, Claude Laurgeau
CII
2006
141views more  CII 2006»
13 years 7 months ago
FPGA-based tool path computation: An application for shoe last machining on CNC lathes
Tool path generation is one of the most complex problems in Computer Aided Manufacturing. Although some efficient strategies have been developed, most of them are only useful for s...
Antonio Jimeno, José Luis Sánchez, H...
IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
14 years 17 days ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...