121 search results - page 4 / 25 » A novel deadlock avoidance algorithm and its hardware implem... |
ICASSP
2010
IEEE
13 years 2 months ago
2010
IEEE
Cooperative communication with multi-antenna relays can significantly increase the reliability and speed. However, cooperative MIMO detection would impose considerable complexity o...
VLSISP
2010
13 years 6 months ago
2010
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
FGCS
2010
13 years 6 months ago
2010
Bulk Synchronous Parallel ML is a high-level language for programming parallel algorithms. Built upon OCaml and using the BSP model, it provides a safe setting for their implementa...
ECBS
2006
IEEE
14 years 1 months ago
2006
IEEE
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary cac...
ASPLOS
2012
ACM
12 years 3 months ago
2012
ACM
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchroni...