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» A novel high throughput reconfigurable FPGA architecture
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DAC
2009
ACM
14 years 20 days ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
ICASSP
2011
IEEE
13 years 15 days ago
High-throughput implementation of tree-search algorithms for vector precoding
This contribution analyzes the architecture design and FPGA implementation of high-throughput multiuser vector precoders. The most complex task of such precoders, i.e. the search ...
Maitane Barrenechea, Luis G. Barbero, Idoia Jimene...
IPPS
2006
IEEE
14 years 2 months ago
On-chip and on-line self-reconfigurable adaptable platform: the non-uniform cellular automata case
In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware imp...
Andres Upegui, Eduardo Sanchez
ANCS
2006
ACM
14 years 2 months ago
Design of a web switch in a reconfigurable platform
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
Christoforos Kachris, Stamatis Vassiliadis
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
14 years 28 days ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki