252 search results - page 43 / 51 » A novel high throughput reconfigurable FPGA architecture |
VTC
2006
IEEE
2006
IEEE
Design and Implementation of Robust Time/Frequency Offset Tracking Algorithm for MIMO-OFDM Receivers
14 years 2 months ago
— In this paper, the robust time and frequency offset tracking algorithms and architecture for high throughput wireless local area network (WLAN) systems are presented. The desig...
DELTA
2010
IEEE
14 years 1 months ago
2010
IEEE
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...
PIMRC
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Dynamic spectrum access (DSA) supporting opportunistic transmission without extra spectrum bandwidth is attractive for future wireless communication. To facilitate such D...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...