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» A performance analysis of local synchronization
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ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 4 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
VLSISP
2008
129views more  VLSISP 2008»
15 years 4 months ago
Architecture and Evaluation of an Asynchronous Array of Simple Processors
Abstract-- This paper presents the architecture of an Asynchronous Array of simple Processors (AsAP), and evaluates its key architectural features as well as its performance and en...
Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, O...
PVLDB
2010
83views more  PVLDB 2010»
15 years 3 months ago
Updatable and Evolvable Transforms for Virtual Databases
Applications typically have some local understanding of a database schema, a virtual database that may differ significantly from the actual schema of the data where it is stored...
James F. Terwilliger, Lois M. L. Delcambre, David ...
ICDAR
2009
IEEE
15 years 11 months ago
Voronoi++: A Dynamic Page Segmentation Approach Based on Voronoi and Docstrum Features
This paper presents a dynamic approach to document page segmentation. Current page segmentation algorithms lack the ability to dynamically adapt local variations in the size, orie...
Mudit Agrawal, David S. Doermann
ICDAR
2003
IEEE
15 years 10 months ago
Combination of Type III Digit Recognizers using the Dempster-Shafer Theory of Evidence
The Dempster-Shafer Theory of Evidence is an established method for combining different sources of information. In this paper we explore ways to improve the combination performanc...
Catalin I. Tomai, Sargur N. Srihari