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CSREAESA
2006
13 years 8 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
SEUS
2008
IEEE
14 years 1 months ago
Model Based Synthesis of Embedded Software
Abstract— This paper presents SW synthesis using Embedded System Environment (ESE), a tool set for design of multicore embedded systems. We propose a classification of multicore...
Daniel D. Gajski, Samar Abdi, Ines Viskic
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 19 days ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
CASES
2005
ACM
13 years 9 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...
RTAS
2002
IEEE
14 years 8 days ago
Minimizing CAN Response-Time Jitter by Message Manipulation
Delay variations (jitter) in computations and communications cause degradation of performance in control applications. There are many sources of jitter, including variations in ex...
Thomas Nolte, Hans Hansson, Christer Norström