420 search results - page 30 / 84 » A pseudo-hierarchical methodology for high performance micro... |
EVOW
2000
Springer
14 years 7 days ago
2000
Springer
Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from f...
EEE
2004
IEEE
14 years 11 days ago
2004
IEEE
For many companies and/or institutions it is no longer sufficient to have a web site and high quality products or services. What in many cases makes the difference between success...
ARITH
2001
IEEE
14 years 9 days ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Clustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we inv...
CF
2005
ACM
13 years 10 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...