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DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 2 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
13 years 6 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng
DAC
2001
ACM
14 years 9 months ago
Semi-Formal Test Generation with Genevieve
This paper describes the first application of the Genevieve test generation methodology. The Genevieve approach uses semi-formal techniques derived from "model-checking"...
Julia Dushina, Mike Benjamin, Daniel Geist
GLVLSI
2009
IEEE
112views VLSI» more  GLVLSI 2009»
14 years 3 months ago
Simultaneous shield and repeater insertion
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
Renatas Jakushokas, Eby G. Friedman
VRML
1998
ACM
14 years 29 days ago
Building OpenWorlds
This paper discusses the history and design decisions behind OpenWorlds, the first C++ toolkit for VRML 2.0 integration. OpenWorlds is a highly extensible set of libraries which s...
Paul J. Diefenbach, Prakash Mahesh, Daniel Hunt