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ASPDAC
2005
ACM
92views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Sleep transistor sizing using timing criticality and temporal currents
— Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to...
Anand Ramalingam, Bin Zhang, Anirudh Devgan, David...
DBSEC
2009
124views Database» more  DBSEC 2009»
13 years 9 months ago
Towards System Integrity Protection with Graph-Based Policy Analysis
Abstract. Identifying and protecting the trusted computing base (TCB) of a system is an important task, which is typically performed by designing and enforcing a system security po...
Wenjuan Xu, Xinwen Zhang, Gail-Joon Ahn
ERSA
2010
159views Hardware» more  ERSA 2010»
13 years 6 months ago
Acceleration of FPGA Fault Injection Through Multi-Bit Testing
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
Grzegorz Cieslewski, Alan D. George, Adam Jacobs
ER
2006
Springer
116views Database» more  ER 2006»
14 years 12 days ago
Quality-Driven Automatic Transformation of Object-Oriented Navigational Models
Abstract. Navigability is a main concern in the design of Web applications. In order to assess such navigability a number of measures has been proposed. From them, measures defined...
Cristina Cachero, Marcela Genero, Coral Calero, Sa...
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
14 years 8 days ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...