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DATE
2010
IEEE
192views Hardware» more  DATE 2010»
14 years 1 months ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
JCP
2008
162views more  JCP 2008»
13 years 8 months ago
A Hypercube-based Scalable Interconnection Network for Massively Parallel Computing
An important issues in the design of interconnection networks for massively parallel computers is scalability. A new scalable interconnection network topology, called Double-Loop H...
Youyao Liu, Jungang Han, Huimin Du
FDL
2005
IEEE
14 years 2 months ago
Embed Scripting inside SystemC
Embedded system designs and simulations become tedious and time consuming due to the complexity of modern applications. Thus, languages allowing high level description, such as Sy...
J. Vennin, S. Penain, Luc Charest, Samy Meftali, J...
IEEEPACT
2006
IEEE
14 years 2 months ago
Core architecture optimization for heterogeneous chip multiprocessors
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...
Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi
UIST
2004
ACM
14 years 2 months ago
Topiary: a tool for prototyping location-enhanced applications
Location-enhanced applications use the location of people, places, and things to augment or streamline interaction. Location-enhanced applications are just starting to emerge in s...
Yang Li, Jason I. Hong, James A. Landay