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PATMOS
2007
Springer
14 years 2 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
ATVA
2008
Springer
144views Hardware» more  ATVA 2008»
13 years 10 months ago
Tests, Proofs and Refinements
1 : Logic in Specification and Verification (abstract) Natarajan Shankar (SRI) Session Chair : Sungdeok Cha 12 : 00 13 : 00 Lunch 13 : 00 15 : 00 2 : Boolean Modeling of Cell Biolo...
Sriram K. Rajamani
EACL
1993
ACL Anthology
13 years 9 months ago
A Strategy for Dynamic Interpretation: a Fragment and an Implementation
The strategy for natural language interpretation presented in this paper implements the dynamics of context change by translating natural language texts into a meaning representat...
Olivier Bouchez, Jan van Eijck, Olivier Istace
TCAD
2008
172views more  TCAD 2008»
13 years 7 months ago
General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodr...
CORR
2004
Springer
176views Education» more  CORR 2004»
13 years 7 months ago
The First-Order Theory of Sets with Cardinality Constraints is Decidable
Data structures often use an integer variable to keep track of the number of elements they store. An invariant of such data structure is that the value of the integer variable is ...
Viktor Kuncak, Martin C. Rinard