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» A routing algorithm for flip-chip design
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TCAD
2008
119views more  TCAD 2008»
13 years 7 months ago
Full-Chip Routing Considering Double-Via Insertion
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures due to the copper cladding process. To improve via yield and reliability, ...
Huang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lum...
DAC
2005
ACM
14 years 8 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
WEA
2007
Springer
97views Algorithms» more  WEA 2007»
14 years 1 months ago
Experimental Evaluations of Algorithms for IP Table Minimization
Abstract. The continuous growth of the routing tables sizes in backbone routers is one of the most compelling scaling problems affecting the Internet and has originated considerab...
Angelo Fanelli, Michele Flammini, Domenico Mango, ...
ISCA
2009
IEEE
192views Hardware» more  ISCA 2009»
14 years 2 months ago
A case for bufferless routing in on-chip networks
Buffers in on-chip networks consume significant energy, occupy chip area, and increase design complexity. In this paper, we make a case for a new approach to designing on-chip in...
Thomas Moscibroda, Onur Mutlu
WWW
2011
ACM
13 years 2 months ago
Inverted index compression via online document routing
Modern search engines are expected to make documents searchable shortly after they appear on the ever changing Web. To satisfy this requirement, the Web is frequently crawled. Due...
Gal Lavee, Ronny Lempel, Edo Liberty, Oren Somekh