359 search results - page 36 / 72 » A section cache system designed for VLIW architectures |
SIGMOD
2011
ACM
12 years 10 months ago
2011
ACM
Conventional OLTP systems assign each transaction to a worker thread and that thread accesses data, depending on what the transaction dictates. This thread-to-transaction work ass...
WMPI
2004
ACM
14 years 1 months ago
2004
ACM
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
WSC
1997
13 years 9 months ago
1997
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
ISSS
1997
IEEE
13 years 12 months ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
MDM
2005
Springer
14 years 1 months ago
2005
Springer
Mobile terminals (cellular phones, PDAs, palmtops etc.) emerge as a new class of small-scale, ad-hoc service providers that share data and functionality via mobile web services’...