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DATE
2000
IEEE
110views Hardware» more  DATE 2000»
14 years 1 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 2 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
CONEXT
2007
ACM
14 years 20 days ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure
ISPD
2006
ACM
126views Hardware» more  ISPD 2006»
14 years 2 months ago
Noise driven in-package decoupling capacitor optimization for power integrity
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...
Jun Chen, Lei He
EH
2000
IEEE
168views Hardware» more  EH 2000»
14 years 1 months ago
The GOLEM Project: Evolving Hardware Bodies and Brains
The GOLEM project is an attempt to extend evolutionary techniques into the physical world by evolving diverse electro-mechanical machines (robots) that can be fabricated automatic...
Jordan B. Pollack, Hod Lipson