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EURODAC
1995
IEEE
127views VHDL» more  EURODAC 1995»
13 years 11 months ago
Layout synthesis for datapath designs
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
Naveen Buddi, Malgorzata Chrzanowska-Jeske, Charle...
ICCAD
2006
IEEE
129views Hardware» more  ICCAD 2006»
14 years 4 months ago
Near-term industrial perspective of analog CAD
Analog and mixed-signal CAD looks like a nice success story: there's been significant research in building design automation tools since the late 80's, and commercial to...
Christopher Labrecque
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
14 years 4 months ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
ICCAD
2004
IEEE
134views Hardware» more  ICCAD 2004»
14 years 4 months ago
Engineering details of a stable force-directed placer
Ana/ytic placement methods that simultaneously minimize wire length and spread cells are receiving renewedattention from both academia and industiy In thispaper we describe the im...
Kristofer Vorwerk, Andrew A. Kennings, Anthony Van...
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 1 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose