132 search results - page 5 / 27 » A statistical multiprocessor cache model |
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
OSDI
1994
ACM
13 years 11 months ago
1994
ACM
Operating system research has endeavored to develop micro-kernels that provide modularity, reliability and security improvements over conventional monolithic kernels. However, the...
ICCD
2011
IEEE
12 years 9 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
HIPEAC
2010
Springer
14 years 6 months ago
2010
Springer
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
ANSS
2002
IEEE
14 years 2 months ago
2002
IEEE
Statistical simulation is driven by a stream of randomly generated instructions, based on statistics collected during a single detailed simulation. This method can give accurate p...