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» A study of slipstream processors
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DAC
2009
ACM
14 years 5 days ago
Design automation for a 3DIC FFT processor for synthetic aperture radar: a case study
This work discusses a 1024-point, memory-on-logic 3DIC FFT processor for synthetic aperture radar (SAR), sent to
Thorlindur Thorolfsson, Kiran Gonsalves, Paul D. F...
EUROPAR
2008
Springer
13 years 9 months ago
Bi-objective Approximation Scheme for Makespan and Reliability Optimization on Uniform Parallel Machines
We study the problem of scheduling independent tasks on a set of related processors which have a probability of failure governed by an exponential law. We are interested in the bi-...
Emmanuel Jeannot, Erik Saule, Denis Trystram
HPDC
1995
IEEE
13 years 11 months ago
Loop Scheduling for Heterogeneity
In this paper, we study the problem of scheduling parallel loops at compile-time for a heterogeneous network of machines. We consider heterogeneity in three aspects of parallel pr...
Michal Cierniak, Wei Li, Mohammed Javeed Zaki
ICASSP
2011
IEEE
12 years 11 months ago
Multi-rank processing for passive ranging in underwater acoustic environments subject to spatial coherence loss
In this work we derive the maximum likelihood estimator for passive wavefront curvature ranging systems operating in environments subject to a spatial coherence loss. As a consequ...
Hongya Ge, Ivars P. Kirsteins
CF
2008
ACM
13 years 9 months ago
Fpga-based prototype of a pram-on-chip processor
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
Xingzhi Wen, Uzi Vishkin