1137 search results - page 37 / 228 » A study of slipstream processors |
JCP
2008
13 years 7 months ago
2008
A huge application domain, in particular, wireless and handheld devices strongly requires flexible and powerefficient hardware with high performance. This can only be achieved with...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
EUROPAR
2000
Springer
13 years 11 months ago
2000
Springer
The aim of this paper is to study the influence of processor mapping on message passing performance of two different parallel computers: the Cray T3E and the SGI Origin 2000. For t...
CORR
2010
Springer
13 years 5 months ago
2010
Springer
In this paper we study the partitioning approach for multiprocessor real-time scheduling. This approach seems to be the easiest since, once the partitioning of the task set has be...
EUROPAR
2009
Springer
14 years 2 months ago
2009
Springer
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...