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FPGA
2006
ACM
98views FPGA» more  FPGA 2006»
14 years 2 days ago
A reconfigurable hardware based embedded scheduler for buffered crossbar switches
In this paper, we propose a new internally buffered crossbar (IBC) switching architecture where the input and output distributed schedulers are embedded inside the crossbar fabric...
Lotfi Mhamdi, Christopher Kachris, Stamatis Vassil...
HOTNETS
2010
13 years 3 months ago
Proteus: a topology malleable data center network
Full-bandwidth connectivity between all servers of a data center may be necessary for all-to-all traffic patterns, but such interconnects suffer from high cost, complexity, and en...
Ankit Singla, Atul Singh, Kishore Ramachandran, Le...
HOTI
2002
IEEE
14 years 1 months ago
A Four-Terabit Single-Stage Packet Switch with Large Round-Trip Time Support
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
François Abel, Cyriel Minkenberg, Ronald P....
SIGCOMM
2010
ACM
13 years 8 months ago
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...
Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad M...
CORR
2010
Springer
142views Education» more  CORR 2010»
13 years 5 months ago
Constructions of Optical Queues With a Limited Number of Recirculations--Part I: Greedy Constructions
One of the main problems in all-optical packet-switched networks is the lack of optical buffers, and one feasible technology for the constructions of optical buffers is to use opt...
Jay Cheng, Cheng-Shang Chang, Sheng-Hua Yang, Tsz-...