Sciweavers

1055 search results - page 148 / 211
» A system level perspective on branch architecture performanc...
Sort
View
DAC
2009
ACM
14 years 3 months ago
On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration
With new technologies, temperature has become a major issue to be considered at system level design. Without taking temperature aspects into consideration, no approach to energy o...
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
TPDS
2008
124views more  TPDS 2008»
13 years 8 months ago
Efficient Breadth-First Search on the Cell/BE Processor
Multicore processors are an architectural paradigm shift that promises a dramatic increase in performance. But, they also bring an unprecedented level of complexity in algorithmic ...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
ESTIMEDIA
2003
Springer
14 years 1 months ago
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration
— The constant increase in levels of integration and the reduction of the time-to-market have led to the definition of new methodologies stressing reuse. This involves not only ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
DAC
1996
ACM
14 years 26 days ago
Introspection: A Low Overhead Binding Technique During Self-Diagnosing Microarchitecture Synthesis
Abstract: Introspection, a zero-overhead binding technique during self-diagnosing microarchitecture synthesis is presented. Given a scheduled control data ow graph (CDFG) introspec...
Balakrishnan Iyer, Ramesh Karri
CDES
2009
170views Hardware» more  CDES 2009»
13 years 9 months ago
Benchmarking GPU Devices with N-Body Simulations
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...