563 search results - page 32 / 113 » A theory-based alternative for the design of instruction: fu... |
ISVLSI
2006
IEEE
14 years 3 months ago
2006
IEEE
With advances in process technology, the feature sizes are decreasing, which leads to higher defect densities. More sophisticated techniques, at increased costs are required to av...
EOR
2007
13 years 9 months ago
2007
This paper models supply chain (SC) uncertainties by fuzzy sets and develops a possibilistic SC configuration model for new products with unreliable or unavailable SC statistical...
ASAP
1996
IEEE
14 years 1 months ago
1996
IEEE
Kestrel is a programmable linear array processor designed for sequence analysis. Among other features, Kestrel includes an 8-bit word, a single-cycle add-and-minimize instruction, ...
IACR
2011
12 years 8 months ago
2011
We consider the family of 2n-to-n-bit compression functions that are solely based on at most three permutation executions and on XOR-operators, and analyze its collision and preima...
WMPI
2004
ACM
14 years 2 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...